1. Field of the Invention
This invention relates to a dry etching method employed for the preparation of semiconductor devices. More particularly, it relates to a method for anisotropic etching of a layer of silicon based material, such as single crystal silicon, polysilicon, silicide of a refractory metal or polycide, to high accuracy by low temperature etching without employing a chlorofluorocarbon (CFC) gas.
2. Description of Related Art
In keeping up with the recent tendency towards high integration and high performance of semiconductor devices, such as VLSIs or ULSIs, a strong demand has been raised for a technology of etching of a layer of silicon based material, such as single crystal silicon, polysilicon, refractory metal silicide or polycide, in such a manner as to meet the requirements, such as high anisotropy, high etch rate or high selectivity, with a high level .
Typical of the etching processes for single crystal silicon is trench etching for isolation of minor-sized elements or procuring a cell capacity space. Although anisotropic processing with a high aspect ratio pattern is required in this process, the cross-sectional shape of the trench tends to be changed intricately due to fluctuations in mask patterns or etching conditions, so that unusual shapes, such as undercuts or bowing, are encountered frequently to produce difficulties in trench filling or capacity control performed in subsequent steps.
Typical of the etching processes for polysilicon, refractory metal silicide or polycide, on the other hand, is gate processing. Since the pattern width in the gate electrode directly affects sidewall dimensional accuracy in an LDD structure, or channel length of a transistor in which the source-drain region is formed in a self-aligned fashion, the gate processing is similarly in need of extremely high processing accuracy.
Conventionally, for etching the layer of the silicon based material, a chlorofluorocarbon (CFC) gas, as exemplified by CFC113 (C.sub.2 Cl.sub.3 F.sub.3), has been used extensively as an etching gas. Since both F and Cl are contained in the molecule of the CFC gas, high anisotropy may be achieved because etching may proceed both by the radical reaction by radicals such as F* or Cl* and by the ion assist reaction by Cl.sup.+, CF.sub.x.sup.+ or CCl.sup.+ ions, whilst sidewall protection may be achieved by a carbonaceous polymer deposited from the gaseous phase.
However, several problems have been pointed out in connection with the CFC gas.
First, carbon contained in the CFC gas deteriorates selectivity with respect to the layer of the silicon oxide (SiO.sub.2). The C--O bond exhibits a higher interatomic bond energy than that of the Si--O bond, so that, if carbon is adsorbed on the surface of a layer of the SiO.sub.2 based material, the Si--O bond may be weakened, or SiO.sub.2 may be reduced to Si, and hence resistivity against halogen-based etchant is lost. This raises a serious problem if gate electrode processing is performed with a thin gate oxide film as an underlying layer.
Secondly, there is a risk of contamination of particles by a carbonaceous polymer. If the design rule for semiconductor devices is refined further in future, the carbonaceous polymer deposited from the gaseous phase is likely to turn out to be a serious source of pollution by particles.
The most serious problem, however, is that the CFC gas is among the factors responsible for destruction of an ozone layer of the earth, and a ban will be placed in the near future on the production and use of the gas. Thus it is incumbent in the domain of dry etching to find out a suitable substitute material for the CFC gas and to establish an effective method of using the substitute material.
Among the techniques thought to be promising for not using the CFC gas, there is a low temperature etching, which is a technique of maintaining the temperature of a substrate to be etched (wafer) at a temperature not higher than 0.degree. C. to freeze or suppress the radical reaction on the pattern sidewall to prevent occurrence of shape unusualties, such as undercuts, while maintaining the etchrate along the depth at a practical level by the ion assist effect. In Extended Abstracts of the 35th Spring Meeting (1988) of the Japan Society of Applied Physics and Related Societies, page 495, lecture number 28a-G-2, for example, a report has been made of an example in which the wafer was cooled to -130.degree. C. and silicon trench etching and etching of a n.sup.+ -type polysilicon layer was performed using the SF.sub.6 gas.
However, if only freezing or suppression of a radical reaction is resorted to for realization of high anisotropy, a lower temperature which may be realized by using liquid nitrogen is necessitated, as discussed above. This raises a problem in hardware aspects because a specific large-sized equipment is necessitated and vacuum sealing is deteriorated in reliability. In addition, the throughput may be lowered and hence economic profitability or productivity may be affected because a time-consuming operation is involved in cooling the wafer and in subsequent heating for resetting the temperature to ambient temperature.